1. Field of the Invention
The present invention relates to controlled epitaxial growth of multiple layers of hexagonal boron nitride. The controlled growth multiple layers of hexagonal boron nitride (h-BN), coupled with the ability to deposit microscopically continuous layers of graphene thereon, paves the way for formation of vertically oriented graphene-based transistors. These and similar devices are also the subject of this patent application.
2. Background of the Invention
The direct growth of graphene films, by industrially practical and scalable methods, including CVD, PVD, or MBE, on dielectric substrates is a critical step towards the development of graphene charge- and spin-based devices. We have demonstrated the CVD growth of single and few-layer graphene on monolayer h-BN(0001)/Ru(0001) [1], CVD or PVD growth on MgO(111) [2,3] and MBE layer-by-layer growth on Co3O4(111)/Co(0001) [4]. The growth of graphene on mica by MBE has also recently been demonstrated [5,6]. These findings are summarized in Table I.
Hexagonal boron nitride (h-BN) is an intriguing material for these applications, being isostructural/isolectronic with graphene. Recent work as reported in L. Britnell, et al., Science 335 (2012) 947 and W. Mehr, et al. IEEE Elect. Dev. Lett. 33 (2012) 691, both of which are incorporated herein by reference for their disclosure graphene based transistor structures, suggests the possibility of vertically-oriented graphene-based transistors in which BN or a similar dielectric is used to control graphene/substrate electron transport, achieving high on/off ratios and operating frequencies in the absence of a graphene band gap.
Methods to prepare the devices described that are susceptible of large scale process formation compatible with Si-CMOS technology limitations are essential before widespread application of such transistors can be realized. The article by Wehr et al. is theoretical only; it neither suggests nor speculates on methods for formation of those devices. While the article by Britnell in fact describes methods for preparing these devices, those methods are not scalable, nor are thy compatible with Si-CMOS technology. In Britnell, the structure described is actually a graphene/h-BN/graphene stack, which does not offer the opportunity to integrate the resulting device with Si-CMOS substrates, the article describing the use of an SiO2 substrate as a gate. Rather than performing controlled deposition of the formation of h-BN, Britnell describes the shattering of relatively thick crystals of h-BN. Thereafter, selected crystals fragments are prepared for the physical transfer of monolayer graphene sheets from a substrate to the h-BN. This is repeated. Neither the process of shattering h-BN crystal and then selecting a promising candidate fragment, nor the physical transfer of a monolayer graphene sheet from one substrate to another is scalable or practical. The resulting graphene device rests on an oxide substrate, which is difficult to further integrate into available devices.
Clearly, applications such as the preparation of integrated vertical graphene transistors would benefit from the ability to precisely control the thickness of h-BN beyond the monolayer limit, suggesting the use of atomic layer deposition (ALD) to form epitaxial h-BN layers with layer-by-layer control. If in fact such epitaxial controlled growth of h-BN can be achieved, the deposition of graphene (one to a few monolayers) thereover is possible in a method consistent with Si-CMOS fabrication. Graphene has been grown by CVD on monolayer h-BN(0001) prepared by ALD, C. Bjelkevig, et al. J. Phys.: Cond. Matt. 22 (2010) 302002.
The use of ALD to form epitaxial multilayers of h-BN, however, has not been reported J. D. Ferguson, A. W. Weimar, S. M. George, Thin Solid Films 413 (2002) describe the formation of a single layer of polycrystalline h-BN by ALD. While of scientific interest, this method is limited. The substrate described for deposition is flakes of insulating ZrO2, another insulator that does not offer a real opportunity for integration with the device. The h-BN of Ferguson is a single layer of polycrystalline h-BN. Ferguson reports that this method is “self-limiting”—that is, a second layer of h-BN cannot be formed. Yet a single layer is unlikely to provide the necessary electron tunneling barrier. Ideally, the barrier element would be subject to modification from substrate material to substrate material so as to be “tunable.” Additionally, a useful process will provide the h-BN-based graphene transistor on a useful emitter—possibly silicon or a transition metal generally. It would be of value to develop methods of achieving controlled epitaxial growth of multilayers of h-BN so that vertically oriented graphene based devices could be prepared which take advantage of the properties of graphene on h-BN.